psn1260a telecommunications satellite terminals global positioning systems 5 40 1230 -65 -99 -20 5 1 -40 to +85 frequency range harmonic suppression (2nd, typ.) sideband spurs (typ.) switching speed (typ., adjacent channel) startup lock time (typ.) operating temperature range package style pll mhz dbc dbc msec msec c vdc ma supply voltage (vcc, nom.) supply current (icc, typ.) all specifications are typical unless other wise noted and subject to change without notice. phase noise (1 hz bw, typical) ? z-communications, inc. all rights reserved page 1 phase locked loop features applications performance specifications value units power supply requirements application notes 1230 mhz ? step size: 1000 khz - style package pll ? ? ? ? a2 rev ? an-107 : how to solder z-comm vcos / plls ? an-202 : pll functional description notes: reference oscillator signal: 5 mhz< <40 mhz frequency synthesizer: national semiconductor - lmx2326 14118 stowe drive, suite b | poway, ca 92064 tel: (858) 621-2700 | fax: (858) 486-1927 power output 12 dbm load impedance 50 step size 1000 khz 250 1290 - ? frequency range: - 1290 charge pump output current phase noise @ 10 khz offset (1 hz bw, typ.) dbc/hz
-100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -5 -4 -3 -2 -1 1260 mhz +1 +2 +3 +4 +5 -3 -2 -1 0 1 2 3 4 5 1210 1220 1230 1240 1250 1260 1270 1280 1290 1300 1310 phase locked loop ? z-communications, inc. page 2 printed in the u.s.a. psn1260a vco power curve, typ. page 2 physical dimensions 8 1 2 3 4 56 7 14 13 12 z-comm xxxxxxxx-lf w/o# d/c 9 10 11 1 rf out 3 ref in 4 clock pin configuration rest ground 5 data 7 lock detect 8 vcc 9 optional 10 n/c note: all dimensions are in inches t ol: xxx: +/- 0.010 6 load enable c 25 vco tuning curve, typ. frequency (mhz) tuning voltage (vdc) c 25 c 0 c 70 frequency (mhz) output power (dbm)
|
